Sanika Joshi

Tech Lead

Tritek Micro Controls Pvt Ltd | April 2016 - Present

IoT Enabled Smart Inhaler * Led development of BLE based Smart Inhaler for one of the top Pharma companies in India. * Achieved 1-year battery life without recharging while ensuring fast connection. * Optimized communication between devices and smartphones to reduce sync times and battery consumption. * Added support for Over the Air Update (OTAU) of device firmware. * Developed companion Android and iOS apps for smartphones featuring support for multiple devices on the same phone and dosage history. * Developed algorithm for precise shake detection using accelerometer. Machine Automation * Led a team of 3 engineers and 5 technicians for more than 10 Machine Automation projects. * Doubled the customer base by upgrading existing products to Industry 4.0 standard by adding Modbus TCP, HTTP, and GSM communication. * Developed remote monitoring and control technology for systems like Smart Irrigation and Moulding Machines. * Developed device drivers of interfaces and protocols like USB, I2C & Ethernet. * Introduced processes like code review and Git version control. * Achieved 30% reduction in testing time and improved reliability by automating the PLC testing procedure and test result logging via USB. * Increased production capacity by 25% by replacing manual soldering of SMDs with a reflow soldering system.

Senior Verification Engineer

Qualcomm | February 2015 - March 2016

Processor Memory BUS Verification * Owned complete test plan development and verification of a multi-core processor component (switch) using UVM to meet coverage goals. * Verified the APB interface to access registers in multiple switches. * Owned the complete verification lifecycle, from system-level concept to tape out.

Senior Verification Engineer

LSI Corporation | February 2012 - February 2015

L2 Cache Verification using UVM * Owned development of the scoreboard module to verify the implementation of the snoop block of L2cache. * Implemented stimulus and checking for loop and DMA testing. * Reduced simulation time in hitting states by implementing L3 cache preload. * Learned UVM on the job and mentored two new team members. Processor Subsystem Verification with ARM processors like Cortex R5, A9, M3, M0 and ARM CoreSight.

University of Minnesota - Twin Cities Campus

Electrical Engineering, MS | August 2010 - January 2012

DAIICT, Gandhinagar (Dhirubhai Ambani Institute of Information and Communication Technology)

Electrical Engineering & Computer Science, B.Tech | August 2006 - May 2010