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Work Experience
Co-Op Engineer
AMD• June 2018 - October 2018
Design verification for a module of the high speed Data Fabric that maintains coherency between the last level cache and main memory controller for high performance x86_64 desktop and server CPUs. Project: Worked on converting parser from last summer to utilize OOP design principles so further expansion would be easier.
Co-Op Engineer
AMD• June 2017 - October 2017
Design verification for a module of the high speed Data Fabric that maintains coherency between the last level cache and main memory controller for high performance x86_64 desktop and server CPUs. Project: Wrote a Look-Ahead LR parser in Perl for pre-processed SystemVerilog files to check code coverage during nightly regressions. The generated parse tree identifies line numbers where sequential code blocks begin/end while taking into account any pre-processor directives that could cause code blocks to not be active. Once testing is complete an HTML page of the original file is generated with begin/end blocks color coded based off coverage results.
Education
University of California, Santa Cruz
Computer Science & Engineering, MS• September 2018 - February 2020
Degree not finished. Currently not in school due to pandemic.
University of California, Santa Cruz
Computer Engineering, BS• September 2015 - June 2018
Concentration: Robotics and Control Graduated with Honors