Badges
Certifications
Work Experience
Software Engineer
Mediatek•  October 2018 - Present
Responsible for LPDDR4X/LPDDR5 driver development/integration/trouble shooting. Have experiences with designing and building a software platform on an in-house MCU by assembly and C language. Detailed: •  Experiences in LPDDR4X/LPDDR5 –   Validation for in-house DRAM controller –   Developed SW for DRAM calibration –   Developed SW for handling runtime DVFS and low-power features –   Integrated and trouble shooting for runtime bit-flip/low-power issues –   Trouble shooting and consultant for DRAM issues •  Experiences in in-house MCU –   Designed and implemented boot/suspend flow –   Designed and implemented interrupt/exception flow –   Designed and implemented platform infrastructures –   Trouble shooting and consultant for MCU related issues
Software Engineer
mediatek•  December 2014 - April 2018
Responsible for platform drivers on the MCU (mostly ARM Families). Developed and maintained boot flow and exception flow for the MCU. Have experiences with designing and building a software platform on an in-house MCU by assembly and C language. Detailed: •  Experiences in embedded system –   Designed and implemented boot flow for an in-house MCU –   Designed and implemented interrupt/exception flow for an in-house MCU –   Experience in RTOS porting and trouble shooting •  Experiences in ARM families –   Responsible to maintaining a bootloader for ARMv7-A/ARMv8-A with GICv2/GICv3 •  Experiences in LPDDR4X DRAM driver integration and trouble shooting –   Failure analysis and trouble shooting for boot fail –   System-level failure analysis for runtime DRAM issues –   Developed helper drivers and tools for memory testing and failure analysis
Software Engineer
Fiberlogic•  October 2011 - November 2014
Designed and developed an IEEE 1588v2 Boundary Clock solution. Have experience with porting IEEE 1588v2 protocol stack to various hardware platforms. Detailed: •  Integrated a commercial software solution for IEEE 1588v2 (Slave Clock) into –   A network processor with a central time counter and –   Trouble shooting for HW/SW integration •  Designed and developed a Boundary Clock (IEEE 1588v2 w/ G.8265.1) solution from scratch with GLib –   Support over ethernet/IPv4UDP –   Support both multicast and unicast (with negotiation) –   Support ITU-T G.8265.1 profile –   Integrated with various third party PHY chips •  Developed a CISCO-like user interface tool •  Developed a library aims for fast building SNMP agent with proprietary MIBs
Education
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